1. Field of the Invention
The present invention relates to a voltage regulator circuit.
2. Description of the Related Art
A semiconductor memory device such as a dynamic random access memory (DRAM) device operates in either an active mode or standby mode at any given time. For example, in a conventional DRAM device, a read or write operation is normally performed in the active mode and a self-refresh operation is normally performed in the standby mode. In many present-day DRAM applications, the total amount of power consumed by the memory device, as well as the power dissipation while in the standby mode, are desired to be as small as possible. This is especially critical in a battery-operated apparatus or system.
In order to reduce power consumption, the semiconductor memory device operates with a lower supply voltage in the standby mode and a higher supply voltage in the active mode. FIG. 1 shows a power supply circuit for generating supply voltages in active and standby modes disclosed in U.S. Pat. No. 7,532,535. The power supply circuit comprises a first buffer 110, a second buffer 120, a switch 130, and a decoupling capacitor 140. An internal integrated circuit 150 is biased with either the active supply voltage VINTH or the standby supply voltage VINTL. When the semiconductor memory device operates in the standby mode, the standby mode signal PSTBY is activated and the switch 130 is turned off. Thus, the internal integrated circuit 150 is biased with the standby supply voltage VINTL. When the semiconductor memory device switches to operate in the active mode from the standby mode, the standby mode signal PSTBY is deactivated such that the switch 130 is turned on. Therefore, the internal integrated circuit 150 is biased with the active supply voltage VINTH. In the configuration of FIG. 1, since the decoupling capacitor 140 charged to the active power voltage VINTH is used for faster transition time once the switch 130 is turned on, the volume of the capacitor 140 is high and thus a large chip area is required.
For the reasons stated above, there is a need for a memory device to provide a voltage regulator circuit for generating supply voltages in active and standby modes. Such a circuit provides a lower standby supply voltage for reducing power consumption in the standby mode and increasing the response time when the memory device switches to operate in the active mode from the standby mode.